1. Field of the Invention
The present invention relates to a semiconductor integrated circuit and, more particularly, to a semiconductor integrated circuit which is preferred to provide, by the digital circuit technology alone, a circuit for generating a clock signal having a frequency which is an integral multiple of the frequency of a clock signal given from the outside.
2. Description of the Prior Art
As already known, semiconductors constituted by using compounds consisting of two or more elements such as GaAs, InP, AlGaAs and InGaAs have come into use these days. As compared with widely used Si semiconductors, these compound semiconductors provide high-speed operations, having particular utility in ultra high-speed and high-frequency devices. However, while realizing high-speed operations, compound semiconductors present such shortcomings as having many crystalline defects caused by the electronic instability on crystalline surfaces, a low mechanical strength, and a high production cost.
These shortcomings make it difficult to provide all circuit elements necessary for constituting a circuit by using only compound semiconductors. Therefore, compound semiconductors are often used to supplement Si semiconductors in providing the characteristics which cannot be obtained from Si semiconductors alone. For these reasons, a combination of compound semiconductors and Si semiconductors are sometimes used on the same substrate constituting a circuit.
To operate an entire circuit consisting of both compound semiconductors and Si semiconductors with a single clock signal, the clock signal must have a frequency suitable for driving the Si semiconductors which operate more slowly than the compound semiconductors on the same circuit, thereby making it impossible to make the most of the excellent characteristic of the compound semiconductors, namely a high-speed operation.
A possible means for overcoming this problem to fully derive the advantage of the compound semiconductors is to operate the compound semiconductors and the Si semiconductors on the same circuit with separate clock signals.
To generate the clock signal for driving the compound semiconductors which operate more quickly than the Si semiconductors, control must be provided so that this clock signal is put in a certain relationship with the clock signal for driving the Si semiconductors.
A circuit for generating a clock signal in a certain relationship with another clock signal is generally comprised of a PLL circuit which consists of a phase comparator 1, a loop filter 2, a voltage control oscillator 3, and a 1/N divider 4 as shown in FIG. 1. However, the PLL circuit shown in FIG. 1 is an analog circuit, making it impossible to constitute the entire clock signal generating circuit by the digital integrated circuit technology alone. Consequently, integrating a circuit including a clock signal generator has heretofore required a complicated process.